Credits: 3

Introduction to reconfigurable computing, FPGA technology and architectures, spatial computing architectures such as systolic and bit serial adaptive network architectures, static and dynamic rearrangeable interconnection architectures, processor architectures incorporating reconfigurabiltiy.

Prerequisites: Background in computer architecture, design, and organization.
Delivery Methods:
CD
Live Streaming Media
Archived Streaming Media

Session Dates: August 20,2007 - December 14,2007
Day/Time: TR 12:40-2 CST.
Textbooks:

No Textbook Required

ISBN: 0000000000
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Instructor:
Joseph Zambreno
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327 Durham
Iowa State University
Ames, IA 50014
Phone: 515-294-3312
Fax:
Instructor's Bio: TBA
Course Website: http://class.ece.iastate.edu/cpre583

Students are assessed tuition, a distance education fee, and a computer fee. More information about tuition and fees...
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